An edge triggered SR flip-flop with extra logic such that only one of the R and S inputs is enabled at any time. This prevents a race condition which can occur when both inputs of an RS flip-flop are active at the same time. In a JK flip-flop the R and S inputs are renamed J and K. The set input (J) is only enabled when the flip-flop is reset and K when it is set. If both J and K inputs are held active then the outputs will change ("togle") on each falling edge of the clock. JK flip-flops can be used to build a binary counter with a reset input.